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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
November 2006
FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Features
95% Efficiency, Synchronous Operation Adjustable Output Voltage from 0.8V to VIN 4.5V to 5.5V Input Voltage Range Up to 2A Output Current Fixed-Frequency 1.3MHz PWM Operation 100% Duty Cycle, Low-Dropout Operation Soft-Start Function Excellent Load Transient Response Power-Good Flag Over-Voltage, Under-Voltage Lockout, Short-Circuit,
Description
The FAN2013 is a high-efficiency, low-noise synchronous PWM current mode DC-DC converter designed for low-voltage applications. It provides up to 2A continuous load current from the 4.5V to 5.5V input. The output voltage is adjustable over a wide range of 0.8V to VIN by means of an external voltage divider. The FAN2013 is enabled when the input voltage on the VIN pin exceeds the UVLO threshold. A current-mode control loop with a fast transient response ensures excellent line and load regulation. The fixed 1.3MHz switching frequency enables designers to choose a small, inexpensive external inductor and capacitor. Filtering can be accomplished with small components, reducing space and cost. Protection features include input under-voltage lockout, short-circuit protection, and thermal shutdown. Soft-start limits in-rush current during start-up conditions. The device is available in a 3x3mm 6-lead MLP.
and Thermal Shutdown Protections
3x3mm 6-lead MLP Package
Applications
Hard Disk Drive Set-Top Box Point-of-Load Power Notebook Computer Communications Equipment
Typical Application
PG +5V VIN PVIN 10F
6 5 4 1
FB PGND SW
P1 (AGND)
10K L1
2 3
R2
R1 VOUT 40F
2.2H
Figure 1. Typical Application
Ordering Information
Part Number
FAN2013MPX
Output Voltage
0.8V - VIN
Pb-Free
Yes
Package Type
MLP-6 3x3mm
Packing Method
Tape and Reel
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Pin Assignment
Top View
FB PGND SW
1 2
6
PG VIN PVIN
P1 (AGND)
5
3
4
3x3mm 6-Lead MLP Figure 2. FAN2013 Pin Assignment
Pin Description
Pin #
P1 1 2 3 4 5 6
Name
AGND FB PGND SW PVIN VIN PG
Description
Analog Ground. P1 must be soldered to the PCB ground. Feedback Input. Adjustable voltage option; connect this pin to the resistor divider. Power Ground. This pin is connected to the internal MOSFET switches. This pin must be externally connected to AGND. Switching Node. This pin is connected to the internal MOSFET switches. Supply Voltage Input. This pin is connected to the internal MOSFET switches. Supply Voltage Input. Open Drain Power Good.
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 2
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Absolute Maximum Ratings
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to AGND.
Symbol
VIN JC TL TSTG TJ Supply Voltage PVIN and any other pin
Parameter
Min.
-0.3 -0.3
(1)
Max.
6.2 VIN 8 260
Unit.
V V C/W C C C kV
Thermal Resistance-Junction to Tab, 3x3mm 6-lead MLP Lead Soldering Temperature (10 seconds) Storage Temperature Junction Temperature Electrostatic Discharge (ESD) Protection Level
(2)
-65 -40 HBM CDM 3.5 2
150 150
Notes: 1. Junction-to-ambient thermal resistance, JA, is a strong function of PCB material, board thickness, thickness and number of copper planes, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics. 2. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charge Device Model).
Recommended Operating Conditions
Symbol
VIN VOUT IOUT L CIN COUT TA Supply Voltage Range Output Voltage Range, Adjustable Version Output Current Inductor(3) Input Capacitor(3) Output Capacitor(3) Operating Ambient Temperature Range 10 20 -40 2.2 20 40 +85
Parameter
Min.
4.5 0.8
Typ.
Max.
5.5 VIN 2.0
Unit
V V A H F F C
Notes: 3. Refer to the Applications Information section for further details.
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 3
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Electrical Characteristics
VIN = 4.5V to 5.5V, VOUT = 1.2V, IOUT = 200mA, CIN = 10F, COUT = 40F, L = 2.2H, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = 25C.
Parameter
Input Voltage Quiescent Current UVLO Threshold PMOS On Resistance NMOS On Resistance P-Channel Current Limit Over-Temperature Protection Switching Frequency Line Regulation Load Regulation Output Voltage During Load Transition(4) Output Voltage During Load Transition(4) Reverse Leakage Current into Pin SW Reference Voltage, VREF
Conditions
IOUT = 0mA VIN rising Hysteresis VIN = VGS = 5V VIN = VGS = 5V 4.5V < VIN < 5.5V Rising temperature Hysteresis
Min.
4.5
Typ.
5
Max.
5.5 10 4.0
Units
V mA V mV m m
3.5
3.7 150 90 90
2.8
3.5 150 20
4.2
A C C
1000 VIN = 4.5 to 5.5V IOUT = 100mA 0mA IOUT 2000mA IOUT from 1500mA to 100mA COUT = 60F IOUT from 100mA to 1500mA COUT = 60F VIN = Open, EN = GND, Vsw = 5.5V VIN = 4.5 to 5.5V 0mA IOUT 2000mA TA = 0C to +85C VIN = 4.5 to 5.5V 0mA IOUT 2000mA TA = -40C to +85C FB voltage rising Hysteresis Isink=6mA, open drain output -5
1300 0.16 0.2
1600
kHz %/V
0.6 5
% % %
0.1 0.8 -2
1
A V
2
%
Output Voltage Accuracy
-3 0.95 x VOUT 2 100
3
% V % s
Power Good Output Threshold and Hysteresis Power Good Output Delay Power Good Output Voltage Low
0.4 1.07 x VOUT 2
V V %
Over-Voltage Protection (OVP) Threshold and FB voltage rising Hysteresis Hysteresis Notes: 4. Refer to the load transient response test waveform in Figure 3.
ILOAD (mA)
1500
tr = 100nsec
ss
tf = 100nsec
100 0
ss
0.6
ssss
4.6
Time (msec)
Figure 3. Load Transient Response Test Waveform
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 4
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Typical Performance Characteristics
TA = 25C, CIN = 10F, COUT = 40F, L = 2.2H, VIN = 5V, VOUT = 1.2V unless otherwise noted.
Figure 4. Start-up with 100mA Resistive Load
Figure 5. Start-up with 2A Resistive Load
Figure 6. Load Transient Response 1.5A to 100mA
Figure 7. Load Transient Response 100mA to 1.5A
Figure 8. Output Voltage Regulation
Figure 9. Power Efficiency
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 5
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Block Diagram
PG VIN PVIN REF FB
PG COMP UNDER VOLTAGE LOCKOUT
IS
CURRENT SENSE
GND DIGITAL SOFT START FB ERROR AMP 0.8V
COMP
LOGIC CONTROL
MOSFET DRIVER
SW
GND
IS OVER VOLTAGE COMP OSC SLOPE COMPENSATION REF FB
GND
Figure 10. Block Diagram
Operation Description
The FAN2013 is a step-down pulse-width modulated (PWM) current mode converter with a fixed switching frequency of 1.3MHz. At the rising edge of each clock cycle, the P-channel transistor is turned on until the PWM comparator trips or the current limit is reached. During the ON time, the inductor current ramps up and is monitored by the internal current-mode control loop. After a minimum dead time, the N-channel transistor is turned ON and the inductor current ramps down. As the clock cycle is completed, the N-channel switch is turned OFF and the next clock cycle starts. The duty cycle is given by the ratio of output voltage and input voltage. The converter runs at minimum duty cycle when output voltage is at minimum and input voltage is at maximum, and at 100% duty cycle when the input voltage approaches the output voltage, as described below. ble voltage drops of the input voltage and eliminates the output voltage overshoot. The soft-start is implemented as a digital circuit, increasing the switch current in four steps to the P-channel current limit (3.5A). Typical startup time for a 40F output capacitor with a load current of 2.0A is 800s.
Output Over-Voltage Protection
When output voltage, VOUT, reaches approximately 7% above the nominal value, the device turns OFF the Pchannel switch and turns ON part of the N-channel transistor with a built-in current limit of about 400mA. When VOUT reaches the hysteresis of about 2%, the device starts switching normally in closed loop. If output voltage is pulled up by an external voltage source with a current limit higher than typical 400mA, the output voltage stays up at the external voltage source level. The over-voltage protection is designed to limit the output voltage excursion in case of a transient response from full load to a minimum load.
100% Duty Cycle Operation
As the input voltage approaches the output voltage and the duty cycle exceeds the typical 95%, the converter turns the P-channel transistor continuously on. In this mode, the output voltage is equal to the input voltage, minus the voltage drop across the P-channel transistor: VOUT = VIN - ILOAD x (RDS_ON + RL) EQ 1 where RDS_ON = P-channel switch ON resistance ILOAD = Output current RL = Inductor DC resistance
Output Short-Circuit Protection
The switch peak current is limited cycle by cycle to a typical value of 3.5A. In the event of an output voltage short circuit, the device operates with a frequency of 400kHz and minimum duty cycle, making the average typical input current .45A.
UVLO and Soft Start
The internal voltage reference, VREF, and the IC remain reset until VIN reaches the 3.7V UVLO threshold. The FAN2013 has an internal soft-start circuit that limits the in-rush current during start-up. This prevents possi(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 6
Thermal Shutdown
When the die temperature exceeds 150C, a reset occurs and remains in effect until the die cools to 130C, when the circuit is allowed to restart.
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Applications Information
Setting the Output Voltage
The internal voltage reference, VREF, is 0.8V. The output is divided down by a voltage divider, R1 and R2 to the FB pin. The output voltage is:
R1 V OUT = V REF 1 + ------ R 2
PCB Layout Recommendations
The inherently high peak currents and switching frequency of power supplies require careful PCB layout design. For best results, use wide traces for high-current paths and place the input capacitor, the inductor, and the output capacitor as close as possible to the integrated circuit terminals. To minimize voltage stress to the device resulting from ever-present switching spikes, use an input bypass capacitor with low ESR. Note that the peak amplitude of the switching spikes depends upon the load current; the higher the load current, the higher the switching spikes. The resistor divider that sets the output voltage should be routed away from the inductor to avoid RF coupling. The ground plane at the bottom side of the PCB acts as an electromagnetic shield to reduce EMI. The recommended PCB layout is shown in Figure 11.
EQ 2
According to this equation, assuming desired output voltage of 1.2V, and given R2 = 10K, the calculated value of R1 is 5K.
Inductor Selection
The inductor parameters directly related to device performance are saturation current and DC resistance. The FAN2013 operates with a typical inductor value of 2.2H. The lower the DC resistance, the higher the efficiency. For saturation current, the inductor should be rated higher than the maximum load current, plus half of the inductor ripple current, calculated by:
I L = V OUT 1 - ( V OUT V IN ) x -----------------------------------------Lxf
EQ 3
where: IL = Inductor Ripple Current f = Switching Frequency L = Inductor Value Recommended inductors are listed in Table 1.
Inductor Value
2.2H 2.2H
Vendor
Coiltronics Murata
Part Number
SD25 2R2 LQH66SSN2R2M03
Table 1: Recommended Inductors
Capacitors Selection
For best performance, a low-ESR input capacitor is required. A ceramic capacitor of at least 10F, placed as close to the VIN and AGND pins as possible, is recommended. The output capacitor determines the output voltage ripple and the transient response. A minimum 20F output capacitor is required for the FAN2013 to operate in stable conditions. Figure 11. Recommended PCB Layout
Capacitor Value
10F
Vendor
Taiyo Yuden TDK Murata
Part Number
JMK212BJ106MG JMK316BJ106KL C2012X5ROJ106K C3216X5ROJ106M GRM32ER61C106K
Table 2: Recommended Capacitors
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 7
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FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
Mechanical Dimensions
3x3mm 6-Lead MLP
Dimensions are in millimeters unless otherwise noted.
Figure 12. 3x3mm 6-Lead Molded Leadless Package (MLP)
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 8
www.fairchildsemi.com
FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator
(c) 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 9
www.fairchildsemi.com

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